ASICs

NORMAL ASICs

Reduce AI energy consumption by 1000x with thermodynamic computing.

AI demand is exploding: bigger models, more inference, continuous retraining.

Moore’s Law has flattened, energy per operation has plateaued, and rising complexity is stretching design cycles.

Energy is now the defining constraint as power budgets, thermal envelopes, and calendar time cap growth.

The most promising path forward is silicon that computes with physics.

Normal’s physics-based ASICs relax the assumptions made in traditional computing, allowing for stochastic, stateful, and asynchronous computing, unlocking orders-of-magnitude more efficient compute.

Sound On

What ARE NORMAL ASICS

Physics-based chips that relax the assumptions of traditional computing, enabling stochastic, stateful, and asynchronous computatio

Stochasticity

Normal ASICs are physics-based chips that relax the assumptions made in traditional computing, allowing for stochastic, stateful, and asynchronous computing. While CPUs and GPUs expend significant energy enforcing deterministic logic, this architecture exploits physical dynamics to unlock orders-of-magnitude more efficient compute for AI workloads.

Thermodynamic Computing

In June 2025, we taped out our first thermodynamic compute chip, CN101 - a critical engineering milestone moving thermodynamic computing from concept to silicon. Our chip is purpose-built to accelerate inference, linear algebra, and sampling workloads for diffusion models. Benchmarking will validate performance and guide the scaling of CN201 and CN301.

Physics Based Architecture

This architecture opens a new path grounded in physics rather than abstraction. By aligning hardware design with the intrinsic properties of physical systems, we can deliver significantly greater inference throughput per watt, rack, and dollar, pairing efficiency with low-latency, high-throughput inference for production workloads.

What Normal ASICs Solve

Normal ASICs are built to accelerate the most demanding AI and scientific workloads:

AI Inference

Bayesian and Probabilistic Machine Learning

Molecular Dynamics and Materials Modeling

Mathematics (inversion, linear systems, exponentials)

Sampling and Optimization (MCMC, Bayesian inference)

Data Analysis (optical, analog)

Diffusion Models (text, image, video, material discovery)

AI Inference and Reasoning

By aligning hardware primitives with the computational structure of diffusion models, transformers, and probabilistic algorithms, Normal ASICs accelerate inference with energy efficiency gains that directly translate into higher achievable compute scales and performance. They also accelerate AI reasoning, making it possible to tackle larger and more complex workloads within fixed infrastructure limits

Sampling and Probabilistic AI

This architecture natively performs Langevin dynamics using stochastic circuits, solving large-scale sampling and optimization problems with minimal energy. It incorporates Normal’s proprietary Lattice Random Walk-based sampling, significantly accelerating probabilistic computations essential for scientific simulations and Bayesian inference.

Scientific Simulation

Our chips execute physical simulations by mimicking nature directly, with stochastic time evolution that can accurately model phemonena in materials science, molecular dynamics, and related fields. They also efficiently solve large-scale linear systems foundational to engineering, scientific computing, and optimization tasks.

How it works

1. Thermodynamic Circuits

Instead of fighting noise, Normal ASICs embrace it. Our thermodynamic circuits evolve in continuous time, naturally solving equations associated with sampling, inference, and optimization.

2. Stochasticity

Unlike traditional ASICs, Normal ASICs aren’t forced into deterministic regimes. Our chips operate asynchronously and statefully, enabling dense, low-latency information processing with minimal power overhead.

3. Physical Co-Design

We co-design algorithms and hardware together, selecting physical substrates that directly realize the mathematical primitives needed for target workloads. This full-stack alignment unlocks new efficiency frontiers.

Silicon Roadmap